Varna, Bulgaria

Welcome to the IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS) 2020

EWDTS-2020 explores the novel trends in testing, diagnosis, repair of microelectronic systems, and also cyber security, automotive, IoT, artificial intelligence.

Svetlana Chumachenko

Svetlana Chumachenko

EWDTS 2016

EWDTS 2016

Vladimir Hahanov

Vladimir Hahanov

EWDTS 2016

EWDTS 2016

Wonderful student

Wonderful student

Wonderful student

Wonderful student

EWDTS 2018

EWDTS 2018

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2017

EWDTS 2018

EWDTS 2018

Call For Papers

The main target of the IEEE East-West Design & Test Symposium (EWDTS) is to exchange experiences between scientists and technologies from Eastern and Western Europe, as well as North America and other parts of the world, in the field of design, design automation and test of electronic circuits and systems. The symposium is typically held in countries around East Europe, the Black Sea, the Balkans and Central Asia region. We cordially invite you to participate and submit your contributions to EWDTS-2020 which covers (but is not limited to) the following topics.

The Symposium will take place in Varna – is the largest city in northeastern Bulgaria, located along the Black Sea coast and Varna Lake. Varna is the administrative center of the municipality and the region, an attractive international educational center. The city has a rich cultural and historical heritage.

Conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases. IEEE reserves the right to exclude a paper from distribution after the conference, including IEEE Xplore® Digital Library, if the paper is not presented by the author at the conference.

Deadlines

Submission deadline:
June 1, 2020

Notification of acceptance:
June 30, 2020

Final Paper Submission (after review):
August 1, 2020


EWDTS-2020 topics:

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  • Analog, Mixed-Signal and RF Test
  • ATPG and High-Level TPG
  • Automotive Reliability & Test
  • Built-In Self Test
  • Debug and Diagnosis
  • Defect/Fault Tolerance and Reliability
  • Design Verification and Validation
  • EDA Tools for Design and Test
  • Embedded Software
  • Failure Analysis & Fault Modeling
  • Functional Safely
  • High-level Synthesis
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  • High-Performance Networks and Systems on a Chip
  • Internet of Things Design & Test
  • Low-power Design
  • Memory and Processor Test
  • Modeling & Fault Simulation
  • Network-on-Chip Design & Test
  • Flexible and Printed Electronics
  • Applied Electronics Automotive/Mechatronics
  • Algorithms
  • Object-Oriented System Specification and Design
  • On-Line Testing
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  • Power Issues in Design & Test
  • Real Time Embedded Systems
  • Reliability of Digital Systems
  • Scan-Based Techniques
  • Self-Repair and Reconfigurable Architectures
  • Signal and Information Processing in Radio and Communication Engineering
  • System Level Modeling, Simulation & Test Generation
  • System-in-Package and 3D Design & Test
  • Using UML for Embedded System Specification
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  • Optical signals in communication and Information Processing
  • CAD and EDA Tools, Methods and Algorithms
  • Hardware Security and Design for Security
  • Logic, Schematic and System Synthesis
  • Place and Route
  • Thermal and Electrostatic Analysis of SoCs
  • Wireless and RFID Systems Synthesis
  • Sensors and Transducers
  • Medical Electronics
  • Design of Integrated Passive Components

Venue

to be done

Committees

  • General Chairs
  • V. Hahanov
  • Y. Zorian – USA
  • General Vice-Chairs
  • R. Ubar – Estonia
  • P. Prinetto – Italy
  • Program Chair
  • S. Shoukourian – Armenia
  • A. Ivanov – Canada
  • Program Vice-Chairs
  • Z. Navabi – Iran
  • M. Renovell – France
  • Finance Chairs
  • E. Litvinova
  • Publicity Chairs
  • S. Mosin – Russia
  • G. Markosyan – Armenia
  • Public Relation Chair
  • V. Djigan – Russia
  • Steering Committee
  • V. Hahanov
  • R. Ubar – Estonia
  • Y. Zorian – USA
  • Organizing Committee
  • Z. Davitadze – Georgia
  • S. Chumachenko
  • E. Litvinova
  • A. Mishchenko
  • Program Committee
  • J. Abraham – USA
  • V. H. Abdullayev - Azerbaijan
  • M. Adamski – Poland
  • A. S. Mohamed – Egypt
  • A. Barkalov - Poland
  • R. Bazylevych
  • A. Chaterjee - USA
  • D. Devadze - Georgia
  • V. Djigan – Russia
  • A. Drozd
  • D. Efanov - Russia
  • E. Evdokimov
  • E. Gramatova - Slovakia
  • G. Harutyunyan - Armenia
  • A. Ivannikov – Russia
  • I. Kabin - Germany
  • M. Karavay - Russia
  • V. Kharchenko
  • M. Khalvashi - Georgia
  • K. Kuchukjan - Armenia
  • V. Kureichik - Russia
  • W. Kuzmicz - Poland
  • A. Matrosova - Russia
  • V. Melikyan - Armenia
  • S. Mosin - Russia
  • O. Novak - Czech Republic
  • A. Orailoglu - USA
  • Z. Peng - Sweden
  • A. Petrenko
  • N. Prokopenko - Russia
  • J. Raik - Estonia
  • A. Romankevich
  • R. Seinauskas - Lithuania
  • S. Sharshunov - Russia
  • A. Singh - USA
  • J. Skobtsov
  • Z. Stamenkovic – Germany
  • V. Tverdokhlebov - Russia
  • V. Vardanian - Armenia
  • V. Yarmolik - Belarus