Accurate power consumption analysis in the early stages of the chip design process can significantly enhance design efficiency, and machine learning (ML) plays a crucial role in such data-centric applications. Architectural-level power analysis provides essential guidance for subsequent detailed design stages. This report reviews the advancements in the application of ML for power prediction, and introduces a machine learning approach for architectural-level power prediction in SystemC and RTL-level designs. By employing an LSTM-based power model, the prediction error at the architectural level can be maintained within 2.6%. Additionally, the report explores the application of graph neural networks to improve the transferability of power analysis, further enhancing the accuracy and applicability of power prediction. Finally, it is concluded that with the continued development of machine learning technologies, their role in chip verification and power prediction and optimization will become increasingly significant.

Bio：Dr. Kang Li is an Associate Professor in the School of Integrated Circuits at Xidian University. His research interests include digital integrated circuit design, optimization and automation technologies, and the study of reliability device and circuit models. He has extensive experience in the design of application-specific processors, PPA (Power, Performance, and Area) optimization, and reliability design techniques. Dr. Li focuses on integrating AI with design automation to develop high-efficiency and high-precision power prediction technologies and has developed power evaluation tools for system-on-chip designs. He has led and participated in more than 10 major projects in related areas, including VLSI key projects, the NNSF of China, the Ministry of Science and Technology's key R&D programs, and industry collaboration projects. He has published over 20 papers indexed by SCI and EI and holds 8 authorized patents.

During the short 66-year old history of integrated circuit development, its parameters have changed at an unprecedented pace. Transistor sizes have shrunk about 10000 times, component number has increased several billion times, absolute power consumption has increased 1000 times, performance has increased several dozens million times, etc. As a result, transition to the era of smart everything took place which gives rise to new challenges for semiconductor industry: silicon complexity, energy efficient design, reliability, etc. There are three main ways to overcome challenges: transistors’ further scaling to angstroms, transition to multi-die systems and intensive use of AI. The report describes the mentioned challenges and ways to overcome them.

Bio Vazgen is the Director of the Synopsys Armenia Educational Department (SAED). He is responsible for deploying the Synopsys University Program and overseeing cooperation with universities in Armenia. In his role, Vazgen leads all components of the educational process in partner universities including curricula development, teaching, internships, and training of professors. In addition, Vazgen organizes and he himself teaches in trainings for Synopsys employees worldwide. He is also the Head of Chairs in four partner universities.
Vazgen is the author of 13 monographs; more than 350 scientific and 150 methodological publications; more than 130 courses; and more than 170 reports. 80 Ph.D. dissertations have been defended under Vazgen’s supervision. He contributes at several local and international scientific conferences and contests serving as President and Member of Program Committees. He is the President of Program Committee of Annual International Microelectronics Olympiad. Vazgen is a member of the Presidium and corresponding member of National Academy of Sciences of Armenia as well as a full member of the International Academy of Engineering.
Vazgen has developed curricula for 2 specializations – IC Design and EDA which are used in about 2000 universities of 75 countries worldwide. Together with his team, he has also developed Educational Design Kits and Process Design Kits for various technology nodes – 90nm, 32/28nm, 14nm and 5 nm. They are deployed in hundreds of organizations and companies and thousands of universities of 80 countries worldwide.
Vazgen has received various awards including the title of Honorable Scientist of the Republic of Armenia, “President of the Republic Prize” in “Technical Sciences and Information Technologies,” National Academy of Sciences of Armenia Prize in the field of applied developments in physical-mathematical and technical sciences and “Best Paper” awards at international conferences. He is an Honorable Professor of several universities including National Research University MIET, Xidian University and European University of Armenia.
Vazgen holds a B.S. from Yerevan Polytechnic Institute and a Ph.D. from Moscow Engineering-Physics Institute. He is a Sc.D., Professor and a Corresponding Member of the National Academy of Sciences of Armenia.

Bio: Dr. Ugurdag has been a professor of EE and CS at Ozyegin University, Istanbul, Türkiye since 2010. He was an ASIC designer in Silicon Valley between 1997-2004. His last position there was with Nvidia. He has 13 years of full-time industry experience doing machine vision, EDA tool development, ASIC and RTL design. During his academic tenure, he has been a consultant to many companies including Synopsys. The companies his students have worked at include Google, Tesla, AMD, ARM, Nvidia, Intel. Dr. Ugurdag is a member of the Steering Committee of VLSI-SoC Conference. He organized VLSI-SoC in Istanbul in 2013 with a record number of attendees (almost 300). Dr. Ugurdag is also a member of IFIP WG 10.5. He was the chair of IEEE Türkiye Section between 2020-2023. His research interests include computer arithmetic, AI acceleration, digital design aspects of communications, networking, video processing, high frequency trading.